B.E B.Tech-CSE IT 512404-6C0061 Computer Architecture & Parallel Processing Sathyabama University Nov 2010

Register Number

                               

SATHYABAMA UNIVERSITY

(Established under section 3 of UGC Act, 1956)

Course & Branch: B.E/B.Tech-CSE/IT

Title of the Paper: Computer Architecture & Parallel Processing

Max. Marks: 80

Sub. Code: 512404-6C0061                                   Time: 3 Hours

Date: 11/11/2010                                                    Session: AN

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PART - A                (10 X 2 = 20)

Answer ALL the Questions

1.     Classify the basic types of information handled by a computer.

2.     Distinguish between bit-slice and word-slice processing systems.

3.     List the three major steps involved in floating-point addition and subtraction operations.

4.     Compare and contrast datapath unit and control unit.

5.     Define temporal and spatial localities of reference.

6.     What is IO-mapped IO?

7.     Differentiate scalar pipeline from vector pipeline system.

8.     List any two primitive types of the vector instructions.

9.     Name any four processor characteristics for multiprocessing.

10.   Mention how data and control tokens are handled in dynamic data flow machines.

PART – B                       (5 x 12 = 60)

Answer All the Questions

11.   Explain the different types of instructions by giving suitable examples for each type.

(or)

12.   Explain in detail, any two architectural features of parallel computers.

       

13.   With a neat diagram, explain the structure of sequential ALU.

(or)

14.   With a neat diagram, explain the organization of microprogrammed control unit.

15.   By defining what cache memory is, explain the set associative and fully associative placement policies.

(or)

16.   Discuss in detail, the concept of direct memory access (DMA) with a neat diagram.

17.   Explain in detail, how array pipeline system helps in finding the product of two matrices.

(or)

18.   Elaborate any two pipelined vector processing methods with necessary example.

19.   Illustrate with a diagram, the tightly coupled multiprocessor systems with private cache and explain it.

(or)

20.   Explain with a neat diagram, the static data flow computer architecture.

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