Saturday, May 30, 2015

IT201 Micro Processor and its Applications B.Tech In Information Technology SRM University

IT201 MICROPROCESSOR AND ITS APPLICATIONS

UNIT I
PART A 2 Marks
1. What do you mean by pipelined architecture? How is it implemented in 8086?
2. Explain the physical address formation in 8086.
3. Draw and discuss flag register in 8086.
4. Explain the function of the following signals of 8086 (1) ALE  (2) DT/ .
5. Explain the function of the following signals (1)     (2)
6. Explain the function of the following signals (1) MN/M     (2) M/
7. Explain the function of the following signals (1)  /GT   (2) NMI
8. Explain the function of the following signals (1)   (2) READY
9. How does 8086 differentiate between an opcode and instruction data?
10. What is the maximum memory addressing and I/O addressing capability of 8086?
11. From which address the 8086 starts execution after reset.
12. Write down the comparisons between 8088 and 8086.
13. What are the different instruction types of 8086?
14. What are the assembler directives and pseudo-ops?
15. How does the CPU identify between 8 – bit and 16-bit operations?
16. Bring out the difference between the jump and loop instruction.
17. Which instruction of 8086 can be used for lookup table manipulation?
18. What is the difference between the respective shift and rotate instructions?
19. How will you enter the single step mode of 8086?
20. What is LOCK prefix? What is its use?
21. What is REP prefix? What is its use?
22. What is an assembler?
23. What is a linker?
24. List the advantages of ALP over machine language.
25. What are the DOS function calls?
26. What is the function 4ch under int21h?
27. What is the difference between a NEAR and a FAR procedure?
28. What is interrupt vector table of 8086?
29. What is a nested macro?
30. Explain the term nested interrupt?
31. How do you pass parameters to macro?
32. What is the role of stack in calling a subroutine and returning from the routine?
33. What are the advantages of having segmented memory?
34. Compute the physical address for the following instructions
Given (CS) = 0A00h, (DS) = 0B00h  (SI) 0100h (DI) = 0200h
(BX) = 0200H XYZ = 0400h
(a) MOV [BX] + XYZ, CX
(b) MOV [BX] [DI] + XYZ, AL
35. Identify the addressing modes for the following instructions.
(a) MOV [DI], AX
(b) MOV [BX] + XYZ, AL
36. Store the number 5678h in memory location DS:2000h using indirect addressing modes.
37. Write a program to add a data byte located at offset 0500h in 2000h segment to another data byte available at 0600h in the same segment and store the result at 0700h in the same segment.
38. Explain the following instructions with example.
(a) AAA (b) DAS


PART B 10 Marks

1. Draw and discuss the internal block diagram of 8086. (10)
2. Draw the register organization 8086 and explain typical applications of each register. (10)
3. Draw and discuss the read and write cycle timing diagram of 8086 in maximum mode. (10)
4. Draw and discuss a typical maximum mode 8086 system? What is the use of the controller in maximum mode. (10)
5. Explain the different type of addressing modes in 8086 with examples. (10)
6. Write an ALP to print a message ‘The Printer in Busy’. On to Dot matrix Printer. (5)
7. Write an ALP to display system date. (10)
8. Write an ALP to sort the numbers  in ascending /decending order. (10)
9. Write an ALP to generate the delay of 100ms using an 8086 system runs on 10 MHz frequency. (10)

UNIT II

PART – A

1. Explain the control word format of 8255 in I/O mode?
2. Explain the control word format of 8255 in BSR mode?
3. Write down the general procedure of static memory interfacing with 8086?
4. How many address lines will require for interfacing the chip 4kx8 & 16kx8?
5. How refresh cycle is different from memory read cycle?
6. A typical 4k bit DRAM has internally arranged in 64 rows & 64 columns. The refresh time interval is 4ms. Calculate the refresh frequency.
7. Bring out the differences between static & dynamic RAM.
8. Explain the interfacing methods of I/O devices in detail.
9. Differentiate I/O mapped and Memory mapped I/O.
10. List out the salient features of BSR mode in 8255.
11. What is CWR?
12. How to address read and write cycle of any one of the four registers in 8255 i.e., 3 port and CWR?
13. What are the salient features of basic I/O mode?
14. What are the salient features of strobed I/O mode?
15. What are the salient features of strobed bidirectional I/O mode?
16. List out some of the techniques used in analog to digital converters.
17. Differentiate ADC & DAC.
18. Interface a 8086 processor with mode 0 (basic I/O mode) of 8255. Initialize port A as input port, port B as output port and port C as output port. Port A address should be 0750H. Write down the control word register format & control word for this problem.








PART – B

1. Design an interface between 8086 CPU and two chips of 16kx8 EPROM and two  
chips of  32k x 8 RAM. Select the starting address of RAM suitably. The RAM address must start at 00000H. (10)
2. Interface a two 4k x 8 EPROMS and two 4k x 8 RAM chips with 8086. Select
suitable maps.
3. Explain the dynamic RAM refreshing logic with neat diagram.
4. Explain the control word format of 8255 in I/O & BSR mode? (5).
5. Explain the different modes of operation of 8255.
6. Interface an input port 74LS245 to read the status of switches sw1 to sw8. The switches, when shorted, input a ‘1’ else input a ‘0’ to the 8086 system. Store the status in register BL. The address of port A is 0740H. (10)
7. Draw an internal architecture of 8255 and explain? (10).
8. Using 74LS373 output port and 7 segment displays design a seconds counter that counts from 0 to 9. Draw the suitable hardware schematic and write an ALP for this problem. Assume that a delay of 1 sec is available as a subroutine. Select the port address suitably. (10).
9. Interface an 8255 with 8086 so as to have port A address 00, port B address 02, port C address 01 and CWR address 03. (10)
10. Interface an 8255 with 8086 to work as I/O port. Initialize port A as output port, port B as input port and port C as output port. Port A address should be 0750H. Write a program to sense switch positions sw0-sw7 connected at port B. The sensed pattern is to be displayed on port A, to which 8 LEDs are connected, while port C lower displays number of on switches out of the total 8 switches. (10)
11. Draw a schematic hardware circuit for interfacing five, 7 seg displays with 8086 using output ports. Display numbers 1 to 5 on them continuously. The 7 seg codes are stored in a look up table serially at the address 2000 : 000H onwards starting from code 1.
12. Draw and discuss the analog to digital convertor 0808/0809.
13. Interface ADC 0808 with 8086 using 8255 ports. Use port A of 8255 for transferring digital data output of ADC to the CPU and porte for control signals. Assume that an analog input is present at I/P2 of the ADC and a clock i/p of suitable frequency is available for ADC. Draw the schematic and write the required ALP.
UNIT –III
PART A 2 Marks
1. Explain the significances of different bits of the control word register format of 8253
2. Explain the functions of the following pins of 8259A
a. CAS0¬ – CAS2 b.
3. Explain the following terms in relation to 8259A.
i. EOI ii. Automatic rotation iii. Automatic EOI iv. Specific rotation
v. Special mask mode vi. Edge and level triggered mode
vii. Cascading viii. Special fully nested mode ix. Buffered mode x. Polling
4. Explain the functions of the following signal sof 8279 ?
i. IRQ ii. SL0 – SL3 iii. RL0 – RL7   iv. SHIFT v. CNTL/STB   vi.
vii. OUT A0 – OUT A3 and OUT B0 – OUT B3
5. What is the sensor matrix mode of 8279 ?
6. Explain the following terms in relation of 8279 ?
i. Two key lock out ii. Left Entry
7. Explain the following terms in relation of 8279 ?
i. N-Key roll over ii. FIFO
8. Explain the following terms in relation of 8279 ?
i. Right entry ii. Display RAM
9. Explain the key code format of 8279 ?
10. List out the different modes of 8253
11. Write short notes on (i) cascade buffer / Comparator, (ii) priority resolver
12. Explain the interrupt sequence in an 8086 – 8259A system
13. Explain interrupt on terminal count mode
14. Explain about the square wave generator mode
15. what are all the types of write operation in 8253.
16. Write short notes on (i) Initialization command words, (ii) Operation command words.
17. Elaborate the need of programmable internal timer 8253.

PART - B
1. Explain the initialization sequence of 8259A ? (5)
2. Explain the FIFO status word of 8279 ? (5)
3. Explain the mode set register of 8279 ? (5)
4. Draw control word format and Bit definitions of 8253 ? (5)
5. Draw OCW format and Bit Definitions of 8259 A ? (5)
6. Draw and explain internal architecture of 8253 ? (10)
7. Explain and draw the different modes of operation of 8253 ?
8. Design a programmable timer using 8253 and 8086. Interface 8253 at an address 0040H for counter 0 and write the following ALPs. The 8086 and 8253 run at 6MHz and 1.5MHz respectively. (10)
a. To generate a square wave of period 1ms.
b. To interrupt the processor after 10ms
c. To derive a mono-shot pulse with quasistable state during 5 ms
9. Draw and explain the internal architecture of 8259A ? (10)
10. Elaborate the need of a dedicated keyboard display controller ? (10)
11. Draw and explain architecture of 8279 ? (10)
12. Explain the different commands of 8279 in brief. ? (10)
13. Discuss in detail the different operating modes of 8259A





UNIT – IV
PART A 2 Marks
1. What is the advantage of DMA controlled data transfer over interrupt driven ? Why are DMA controlled data transfers faster ?
2. Draw and discuss the mode set register of 8257?
3. Draw and discuss the status register of 8257 ?
4. What are the register available in 8257 ? What are their function ?
5. Explain the priorities of DMA request inputs of 8257 ?
6. Bring out advances in 8237 over 8257 ?

7. Discuss the following mode of DMA transfer
d. Single transfer mode
e. Block transfer mode
8. Discuss the following mode of DMA transfer
f. Demand transfer mode
g. Memory to Memory transfer
9. Write short notes on floppies ?
10. What do you mean by SD and DD floppies ?
11. Justify the storage capacities of 360KB, 1.2MB and 1.44 MB floppies.
12. What is the advantage of MFM over FM ?
13. What is the need of a PLL circuit in drive interface circuit ?
14. How does the FDC finds out the sector 0 on a track?
15. What do you mean by cylinder ?
16. What do you mean by attributes and special codes ?

PART B
1. Draw and discuss the architecture of DMA 8257.(10)
2. Explain about DMA transfers and operations. (5)
3. Draw and discuss the architecture of 8272 FDC. (10)
4. Discuss the different phases of command execution of 8272. (5)
5. Draw and discuss the architecture of 8275 CRT. (10)
6. Discuss the status register of 8275. (5)
7. Discuss the functions of all the signals of 8275. (10)
8. Draw and discuss a general block diagram of an 8275 interfaces with 8086.




UNIT V
PART A 2 Marks
1. Write short notes on i. Shared bus configuration of multiprocessor configuration
2. Write short notes on Linked I/O  of multiprocessor configuration
3. Write short notes on Multiport memory configuration of multiprocessor configuration
4. Write short notes on Bus window of multiprocessor configuration
5. Write short notes in the following inter connection topologies. (a) Star inter connection  (b) Loop interconnection
6. Write short notes in the following inter connection topologies. (a) Regular Topology (b) Irregular Topology.
7. What are the different types of instructions available in the instruction set of 8087?
8. What is the difference between a loosely coupled and a closely coupled system?
9. What are the different types of exception which may be generated by 8087?
10. What are the different data types support by 8087.
11. How does the CPU differentiate the 8087 instruction from its own instruction.
12. What is called numeric data processor
13. What are called coprocessors.
14. Explain about distributed operating systems
15. Write short notes on dairy chaining
16. List out the function of interrupt service routines in the main program design.

PART B
1. Discuss the software design aspects of multi microprocessor system. (5)
2. Draw and discuss the architecture of 8087. (10)
3. Discuss the function of all signals of 8087. (10)
4. Discuss register set of 8087. (5)
5. Draw and discuss the interface between 8086 and 8087 (10)
6. Draw and discuss the architecture of 8089 I/O processor (10)
7. Write short notes on (10)
a. Polling
b. Daisy chain
c. Independent bus request scheme
8. Explain an instruction sets of 8087 ? (10)


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