GEOGRAPHICAL INDICATIONS AND LAYOUT DESIGNS OF INTEGRATED CIRCUITS (Paper – IV),University Of Pune Question Paper,Diploma Course in Intellectual Property Right Laws,2011 Question Paper

University Of Pune Question Paper
Diploma Course in Intellectual Property Right Laws Examination, 2011
INDUSTRIAL DESIGNS, GEOGRAPHICAL INDICATIONS AND
LAYOUT DESIGNS OF INTEGRATED CIRCUITS (Paper – IV)
Time : 3 Hours Max. Marks : 100
 Instructions : i) Q. No. 8 is compulsory. Out of the remaining attempt any five
questions.
ii) Figures to the right indicate full marks.
1. Discuss the objects and reasons of law relating to Geographical Indications. 16
2. Discuss with respect to the Geographical Indication Act, 1999
a) Effect of registration
b) Powers and functions of Registrar. 16
3. Discuss the role played by the Paris Convention of 1967 to develop the law
regarding protection of Industrial Designs. 16
4. Discuss the salient features of the Geographical Indication Act, 1999. 16
5. State and explain the composition, powers and functions of the Layout Design
Appellate Board, established by the Central Government under the Semi-conductor
Integrated Circuits Layout Design Act, 2000. 16
6. Highlight the main provisions of Piracy of Designs under the Design Act, 2000. 16
7. Explain the provision regarding registration of Layout-Designs under Design Act,
2000. 16
8. Write short notes on the following : 20
a) The Treaty in respect of Integrated Circuits, Washington D.C. 1989.
b) Geographical Indication and Trade Mark.
c) Prohibition of registration under the Geographical Indications Act.
d) Difference between Industrial Designs and Layout-Design.
————————

Share This