Wednesday, January 12, 2022

Dr.A.P.J.Abdul Kalam University BE III SEM ALL BRANCH DEC 2020 Digital Circuit & Design [CS222T] Dec - 2020 Question Paper

Dr.A.P.J.Abdul Kalam University Old Question Papers

Bachelor of Engineering

Third Semester Main Examination, Dec-2020

Digital Circuit & Design [CS222T]

Branch-CS

Time: 3:00 Hrs Max Marks 70

Note : Attempt any five questions. All question carry equal Marks.

Q.1 (a) Write down AND gate, NAND gate and exclusive-OR gate with suitable diagram and truth table.

(b) Explain De-Morgan’s theorem with example.

Q.2 (a) Explain C-mos inverter and C-mos gates.

(b) Write short note on : (i) PROM (ii) EPROM (iii) static RAM.

Q.3 (a) Explain PLA and PAL.

(b) Describe the following: (i) RTL (ii) DTL (iii) TTL

Q.4 (a) Explain ring counter and shift counter?

(b) What is universal shift register? Explain it.

Q.5 (a) Design of synchronous counter?

(b) Write down the Asynchronous counter?

Q.6 (a) What is difference between level triggering and edge triggered?

(b) Write down the master-slave flip-flop.

Q.7 (a) Explain SR flip-flop and JK flip-flop?

(b) What is a decoder and explain how 3*8 decoder is constructed?

Q.8 (a) Write down half adder substractot with truth table?

(b) Simplify the logic function using K-map

F ( A, B, C ) = A’C+A’B+AB’C+BC

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