Anna University
Question Paper Code : 40431
B.E./B.Tech. DEGREE EXAMINATIONS, NOVEMBER/DECEMBER 2021.
Sixth/Seventh Semester
Electronics and Communication Engineering
EC 8095 – VLSI DESIGN
(Common to : B.E. Electrical and Electronics Engineering/B.E. Electronics and Instrumentation Engineering/B.E. Electronics and Telecommunication Engineering/ B.E. Instrumentation and Control Engineering/B.E. Robotics and Automation)
(Regulations 2017)
Time : Three hours Maximum : 100 marks
Answer ALL questions.
PART A — (10 x 2 = 20 marks)
1. How does a transmission gate produce fully restored logic output?
2. Define low noise margin and high noise margin of a CMOS inverter.
3. State the operations performed during pre charge and evaluate phase of dynamic circuits.
4. List the sources of power dissipation in CMOS circuits.
5. What is meant by bistability?
6. Define clock skew in digital circuits.
7. Draw the circuit diagram of 1-bit binary shifter using MOS transistor.
8. State the need of a sense amplifier in a memory cell.
9. List the common techniques for ad hoc testing.
10. What are the limitations of IDDQ testing?
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