Anna University Previous Years Question Paper
Question Paper Code : 40450
B.E./B.Tech. DEGREE EXAMINATIONS, NOVEMBER/DECEMBER 2021.
Fifth Semester
Electronics and Communication Engineering
EC 8552 – COMPUTER ARCHITECTURE AND ORGANIZATION
(Common to B.E. Electronics and Telecommunication Engineering)
(Regulations 2017)
Time : Three hours Maximum : 100 marks
Answer ALL questions.
PART A — (10 2 = 20 marks)
1. List the difference between wall clock time and response time.
2. Find the cycle time of a 450MHz clock frequency.
3. What is underflow in floating point arithmetic?
4. Write the expression for double precision number available in IEEE 754 format.
5. In a data path diagram, what is the size of ALUop control signal?
6. How PCSrc signal generated in a data path diagram?
7. In memory organization, what is temporal locality?
8. Considering memory hierarchy, define hit and miss.
9. Define fine-grain multithreading.
10. List the benefits of clustering in a computer architecture.
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