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Code No:54010
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY, HYDERABAD
B.Tech II Year II Semester Examinations, December - 2018
SWITCHING THEORY AND LOGIC DESIGN
(Common to EEE, ECE)
Time: 3 hours Max. Marks: 75
Attachment in PDF: Click Here to download JNTUH B.Tech switching theory and logic design December - 2018 Question Paper
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